ASIC CAD/Flow Engineer

Arago is an AI and computer hardware company whose mission is to drive the course of history forward. We do so by accelerating breakthroughs at the intersection of AI and semiconductors.

Founded in 2024 by AI researchers and physicists with deep expertise in photonics, electronics, software, mathematics, and machine learning, Arago brings together a lean team of engineers and scientists from the world’s top companies and research labs.

Composed of nine nationalities and operating from hubs in France, North America, and Israel, we believe in great science and fast achievements. Our work is guided by these core principles:

1. Do great things: we deliver work we’re proud to sign our name to.

2. High velocity: speed matters. We move quickly, one step at a time.

3. One unit: we’re all in this together, with relationships grounded in trust, respect, and camaraderie.

Arago is backed by executives from Apple, Arm, Nvidia, Microsoft, and Hugging Face, as well as prominent US and European deeptech venture firms and exited founders.

The successful candidate will be the technical expert ensuring a robust, unified, and efficient environment, enabling both our digital and analog design teams to focus on innovation while maintaining operational excellence. You will be a core technical contributor for our cutting-edge ASIC mixed-signal IC design project utilizing advanced CMOS technology.

• Education: Bachelor’s degree in Electrical Engineering, Computer Science, Computer Engineering, or a related technical field.

• Experience: 5+ years of relevant CAD/Flow support experience in the semiconductor industry, specifically supporting complex IC design projects.

• Strong communication skills and ability to support cross-functional teams.

• Programming & Scripting: Strong proficiency in programming and scripting languages such as Python, SKILL, and/or others used for design automation.

• Operating System: Strong knowledge of Linux and shell scripting is essential for environment maintenance and flow automation.

• Semiconductor CAD Knowledge: Proven track record in managing and supporting EDA tools for mixed-signal design flows.

• Familiarity with version control systems (Git, SOS) and job scheduling systems (LSF, Slurm, net-batch).

• CAD Infrastructure & Automation: Create, maintain, and enhance the complete CAD infrastructure, and develop/implement custom scripts to automate design flows, improving overall efficiency and throughput.

• EDA Tool Expertise: Serve as the go-to expert for EDA tool support, managing installation, configuration, licensing, and integration across the design environment.

• Foundry Kit Integration: Integrate foundry EDA kits into the Arago environment (or equivalent internal platform) and manage Process Design Kits (PDKs).

• Team Collaboration: Collaborate closely with both Analog and Digital Design Teams to understand their specific needs, resolve issues, and drive continuous improvements in methodologies and efficiencies.

• Tape-Out Preparation: Lead and execute all technical aspects of the critical tape-out preparation process, including managing Tapeout checklists, collaborating seamlessly with fabrication partners, and implementing checks like TAP and NCAP.

• CI Automation: Drive the implementation of CI automation for design flows.

• Vendor Liaison: Work directly with EDA tool vendors to evaluate new tools, solve critical bugs, and improve overall usability and methodology.

• Compute Environment Management: Manage and maintain the underlying Linux infrastructure, including shell scripting and compute environments, ensuring robust operations.

• Competitive cash compensation, with final package based on location, experience, and the pay of team members in similar positions.

• Meaningful stock option plan offered at the earliest stage of the company (included in the majority of full time offers).

• Relocation bonus and coverage of moving expenses for relocation within 20 minutes of the company’s location.

• Healthcare coverage (including family-friendly options), pension contributions, professional development support, and 25 days of PTO, in addition to public holidays.

• Ownership of a key technical domain, with significant vertical and/or horizontal growth opportunities, based on performance and individual drive.

• Reimbursement of 50% of the public transport subscription fee.

• A high-paced, multicultural (with 10 nationalities), and engineering-led environment.

• Screening Call : Get to know you beyond your CV.

• Technical meeting : Deep dive into your past projects and technical achievements.

• CEO Interview : Assess the fit with the team’s culture and long-term vision.

• Reference Calls: Mandatory calls with your former managers to validate strengths, weaknesses, and work style.

• Technical Assessment: Take-home technical assignment crafted to the role you’re applying for.

• Final Interview : Discuss your technical assignment and address any remaining questions with team members.