ASIC Architect, Principal (AI Inference)

Reposted One Month Ago
Be an Early Applicant
Hiring Remotely in Canada
Remote
300K-350K Annually
Expert/Leader
Hardware • Information Technology • Software
The Role
Lead architecture and performance exploration for next-generation AI inference accelerators. Build analytical models and simulation frameworks, define subsystem interfaces and roadmaps, and drive hardware/software co-design with compiler, runtime, ML, and silicon teams to optimize latency, throughput, memory, interconnects, power, and cost for evolving LLMs and transformer-based workloads.
Summary Generated by Built In
About Positron AI

Positron AI is building next-generation AI inference accelerators designed from the ground up for low-latency, high-throughput large language model inference. Chips built for the training era keep running into two walls at inference time: memory bandwidth and chip-to-chip networking. We designed our architecture to break through both. Our first-generation Atlas systems are deploying in Oracle Cloud Infrastructure. Asimov, our first custom ASIC, takes that architecture to silicon. In simulations, Asimov delivers several times more tokens per dollar and tokens per watt than leading GPUs, at a fraction of the power. Paired in our Titan system, Asimov is built to serve models beyond 16 trillion parameters. In September 2026, we raised $875 million at a $5 billion valuation. NEA led the round, joined by Atreides Management, Valor Equity Partners, and others, to bring Asimov and Titan to market. Our team includes engineers from Groq, Lambda, NVIDIA, Meta, F5, and many other industry leaders.

Role Overview

We're looking for an exceptional Principal ASIC Architect to help define the future of AI inference hardware. You will collaborate across architecture, software, machine learning, systems, and silicon implementation to design next-generation AI accelerators capable of serving rapidly evolving frontier models. This role requires exceptional technical breadth, balancing mathematical understanding, ML trends, systems architecture, and practical silicon implementation. This may be the single most important technical hire after the Chief Architect.

Key Responsibilities

Architectural Exploration

  • Own architectural exploration across the evolving landscape of transformer models, MoE, sparse models, and long-context inference.
  • Evaluate emerging techniques including speculative decoding, continuous batching, KV-cache evolution, sub-quadratic and linear attention, and state-space models.
  • Assess memory architectures, communication architectures, and interconnects for next-generation accelerators.

Performance Modeling

  • Develop analytical models and build simulation frameworks to evaluate architectural tradeoffs.
  • Estimate latency, throughput, bandwidth, memory and compute utilization, scaling efficiency, power, area, and cost.

Hardware/Software Co-Design

  • Partner closely with compiler, runtime, system software, firmware, ASIC engineering, and ML research teams to align hardware direction with real workload needs.

ASIC Specification & Roadmap

  • Develop architecture documents and define subsystem interfaces.
  • Evaluate tradeoffs across competing architectural directions and guide the future product roadmap.

Industry Awareness

  • Track new LLMs, reasoning models, research papers, hardware competitors, academic research, and emerging algorithms to keep Positron's architecture ahead of the field.

AI-Enabled Engineering

  • Use AI to accelerate research, performance analysis, architecture exploration, simulation generation, and documentation.
Required Qualifications
  • 15+ years of experience in ASIC architecture.
  • Deep expertise in AI accelerator design and high-performance SoCs.
  • Hands-on experience building performance models for memory systems and interconnects.
  • Strong hardware/software co-design ability.
  • Excellent written and verbal communication skills.
Preferred Qualifications
  • Experience with GPU architecture.
  • A solid grasp of ML systems, distributed inference, and large-scale serving.
  • Deep knowledge of transformer internals.
  • Compiler experience.
  • A track record of research publications.
Leveling & Scope

While this role is currently posted at a specific level, we are a growth-oriented organization and are open to hiring at a more senior level for the right candidate. Please note that this job description serves as a focused but generalized overview of the role; specific responsibilities and impact expectations will be tailored to the experience and seniority of the final hire.

What Success Looks Like

Success in this role looks like helping define future Positron architectures and creating a scalable architectural direction that bridges software and hardware, influencing products that remain competitive for years despite rapidly evolving AI models.

Why Join Us?
  • Shape the core architecture of Positron's AI inference accelerators at a foundational level, with outsized influence over the company's technical direction for years to come.
  • Work at the intersection of frontier AI research and silicon implementation, tackling problems few architects in the industry get to own end to end.
Compensation & Benefits

The base salary range for this role is $300,000 – $350,000.

 

Please note that the figures provided represent the base salary range only and do not include other elements of our total compensation package, equity, or comprehensive benefits.

 

At Positron AI, we value the unique expertise each candidate brings. While the range above reflects our typical expectation for the position, we reserve the flexibility to exceed this range for candidates whose specialized skills, significant experience, or unique qualifications fall outside the standard scope of the role. Final offers are determined based on a variety of factors, including internal equity, and individual impact.

Benefits & Perks

We want you to do your best work and feel confident that you and your family are taken care of. That means comprehensive coverage, real time to rest, and support for your future.

Health and wellness

  • Fully company-paid medical, dental, and vision insurance for you and your dependents
  • Company-paid life and disability coverage, with voluntary options to add more
  • Supplemental hospital, critical illness, and accident coverage available

Time off and flexibility

  • Unlimited paid time off, so you can truly unplug and recharge
  • 13 paid company holidays
  • Remote-first culture with a company-provided computer and home office setup

Compensation and future

  • Competitive salary and equity
  • 401(k) with company matching, eligible from day one
Visa Support

This position is open to candidates currently authorized to work in the U.S. We cannot provide new visa sponsorship for this role but are open to facilitating H-1B visa transfers for eligible candidates.

 

Equal Opportunity Employer. If you're excited about the role but don't meet every bullet, we'd still love to hear from you.


Skills Required

  • 15+ years of experience in ASIC architecture.
  • Deep expertise in AI accelerator design and high-performance SoCs.
  • Hands-on experience building performance models for memory systems and interconnects.
  • Strong hardware/software co-design ability.
  • Excellent written and verbal communication skills.
  • Experience with GPU architecture.
  • Solid grasp of ML systems, distributed inference, and large-scale serving.
  • Deep knowledge of transformer internals.
  • Compiler experience.
  • Track record of research publications.
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The Company
HQ: Montréal
42 Employees
Year Founded: 2023

What We Do

Positron delivers vendor freedom and faster inference for both enterprises and research teams, by allowing them to use hardware and software explicitly designed from the ground up for generative and large language models (LLMs). Through lower power usage and drastically lower total cost of ownership (TCO), Positron enables you to run popular open source LLMs to serve multiple users at high token rates and long context lengths. Positron is also designing its own ASIC to expand from inference and fine tuning to also support training and other parallel compute workloads.

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