The successful candidate shall possess the capability to design and analyze high speed, high performance analog / mixed signal circuits, including data converters, PLLs, and SERDES, in advanced CMOS FinFET technologies. She or he shall bring the design all the way to production.
- Design, implement, and simulate the functionality and performance of various high-speed analog circuits, including the ADCs and DACs;
- Create the layout floor plans to optimize the overall performance; Supervise the layout activities and give concise guidelines to layout engineers, need to be hands on in drawing layout if necessary;
- Exploring the trade-offs of the different topologies and propose the best solution to achieve or exceed the requirements in terms of power/area/linearity/bandwidth, etc.
- Develop the analog testing plans and work with the PE/TE teams to characterize the functionality and performance of the products to ensure the quality;
- Need to support and comply with the team’s design methodologies and release flows.
Mandatory Knowledge/Skills/Abilities:
- Must be extremely familiar with essential CAD tools, such as Cadence Virtuoso, Spectre, Incisive, Calibre, EMX, and Totem EM/IR, etc.
- Must have a proven tracking record of designing complex analog / mixed signal IPs or chips in deep submicron CMOS technologies.
- Must have experiences in bringing high performance analog IPs including but not limited to high-speed ADC, high-speed DAC, and high-frequency low-jitter PLL to production.
- Must have a decent understanding in CMOS analog / mixed signal design methodologies and circuit analysis;
- Must have a good understanding of device physics and the impacts of layout effects;
- Able to perform the behavioral modeling the blocks and circuits with Verilog-A or Verilog-AMS;
- Collaborative with other local or remote team members in a fast-paced professional environment.
Preferred Knowledge/Skill/Abilities:
- Fluent in verbal and written communications;
- Independently resolves issues and conquer design challenges;
- Self-motivated and detail-oriented;
- Has the knowledge of (optical) communication theories and Matlab coding.
Education and Experience Requirements:
- Minimum Requirement for Principal Design Engineer: M.S. in E.E. with 8-12 years’ experience, or Ph.D. in E.E. with 4-8 years’ experience
歡迎身障求職者
Skills Required
- Extremely familiar with CAD tools such as Cadence Virtuoso, Spectre, Incisive, Calibre, EMX, Totem EM/IR
- Proven track record designing complex analog/mixed-signal IPs or chips in deep submicron CMOS technologies
- Experience bringing high-performance analog IPs (high-speed ADC, high-speed DAC, high-frequency low-jitter PLL) to production
- Good understanding of CMOS analog/mixed-signal design methodologies and circuit analysis
- Good understanding of device physics and impacts of layout effects
- Able to perform behavioral modeling with Verilog-A or Verilog-AMS
- Collaborative with local or remote team members in a fast-paced professional environment
- M.S. in Electrical Engineering with 8-12 years' experience, or Ph.D. in Electrical Engineering with 4-8 years' experience
- Fluent verbal and written communication
- Ability to independently resolve issues and overcome design challenges
- Self-motivated and detail-oriented
- Knowledge of optical communication theories and Matlab coding
Nokia Compensation & Benefits Highlights
The following summarizes recurring compensation and benefits themes identified from responses generated by popular LLMs to common candidate questions about Nokia and has not been reviewed or approved by Nokia.
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Equity Value & Accessibility — Equity programs include a global employee share purchase plan with company matching and multi‑year share awards. These mechanisms broaden participation and tie rewards to long‑term outcomes.
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Healthcare Strength — Health coverage includes major medical plans with supplementary options such as vision, legal services, and care navigation. The range of offerings indicates comprehensive support for medical needs.
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Parental & Family Support — A global policy grants paid leave for new parents regardless of gender and provides structured return‑to‑work support. Company‑paid life insurance further strengthens family protection across regions.
Nokia Insights
What We Do
At Nokia, we create technology that helps the world act together. As a trusted partner for critical networks, we are committed to innovation and technology leadership across mobile, fixed and cloud networks. We create value with intellectual property and long-term research, led by the award-winning Nokia Bell Labs. Adhering to the highest standards of integrity and security, we help build the capabilities needed for a more productive, sustainable and inclusive world.
