Analog Design Engineer

Cyient is a global engineering and technology solutions company. As a Design, Build, and Maintain partner for leading organizations worldwide, we take solution ownership across the value chain to help clients focus on their core, innovate, and stay ahead of the curve. We leverage digital technologies, advanced analytics capabilities, and our domain knowledge and technical expertise, to solve complex business problems.

With over 15,000 employees globally, we partner with clients to operate as part of their extended team in ways that best suit their organization’s culture and requirements. Our industry focus includes aerospace and defence, healthcare, telecommunications, rail transportation, semiconductor, geospatial, industrial, and energy.

Job Description

ASIC Design Engineer - Entry

Designs advanced analog and mixed-signal integrated building blocks for RF CMOS, high-speed data communication, data acquisition and low-power & low-voltage applications.

Key responsibilities

• Contributes to the successful realization of a project in a design team.
• Design a given topology to meet the given specifications in the foreseen timeframe.
• Achieves the successful realization of the layout in close collaboration with layout team.
• Shares design experiences with co-developers and/or other designers of the company.
• Contributes to the achievement of the quality objectives as stated in the quality policy of AnSem (a Cyient company).

Tasks

• Design & Layout
  • Performs design and takes corrective actions in such a way that the final result meets all requirements as stated in the Design document, including all remarks from review.
  • Enters the given design schematic in the schematic entry tool.
  • Creates size file according to the Design guidelines.
  • Generates simulation decks to qualify the design.
  • Qualifies the design with the appropriate tools.
  • Generates layout layout instructions for layout team.
  • Creates extracted netlist for backannotation
  • Does a self review before Analog Design Review
  • Performs critical simulations with extracted netlist
• Reporting & Communication
  • Reports proactively progress and slippage of assigned tasks to PL
  •  Writes design documents
  • Fills in building block wiki pages, including the layout instructions
  • Delivers the following files to PL:
    • Schematics (readable on-screen and printed)
    • Size files (commented),
    • Simulation files (set-up files + results typical),
    • Qualification files: corner set (2^n) and summary.
  • Notifies PL that design is ready for review.
  • Reports all layout issues that come up during the layout review in the Block review document, including a corrective action list and notifies the LE
  • Updates the building block wiki page after after backannotation
  • Makes notes of all oral communication with external people.
  • Fills in weekly time sheet form including planning, comments and remaining work
  • Hands over all received printed project related documentation to Admin.
• Meetings
  • Organizes design review meeting with PL and 3rd person to check if all the design spec requirements are met as stated in the Design document.
  • Attends weekly Design team meeting.
  • Attends wrap-up meeting
  • Attends review meetings

Quality

• Is committed to complying with the requirements of the Quality Management System that are related to the job title and to possible changes of the system.
• Is committed to developing and implementing AnSem’s Quality Management System and continually improving its effectiveness

Education/experience:

• Degree in electrical engineering (microelectronics preferred).

Mandatory competences

• Language: Fluency in English, both written and spoken.
• Problem solving skills: Able to solve problems and implement solutions autonomously.
• Social skills: Able to work in a team.

Desirable competences

• Language: understanding of Dutch
• Verbal and written communication skills: Able to communicate information and ideas in speaking and writing so others will understand.

Reports to

• Project leader
• Team Leader Analog Design

Skills & Experience

Analog Design, Mixed Signal ASIC, RFIC Design

Cyient is an Equal Opportunity Employer.

Cyient recruits, employs, trains, compensates, and promotes regardless of race, color, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, gender, gender identity or expression, veteran status, and other protected status as required by applicable law. We are proud to be a diverse and inclusive company where our people can focus their whole self on solving problems that matter.