Analog Design Engineer, Senior Staff

Reposted 4 Days Ago
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Santa Clara, CA
In-Office
155K-250K Annually
Senior level
Artificial Intelligence • Machine Learning • Software
The Role
Design analog-mixed signal integrated circuits, optimize for low power performance, and collaborate on silicon bring up and debugging.
Summary Generated by Built In

At d-Matrix, we are focused on unleashing the potential of generative AI to power the transformation of technology. We are at the forefront of software and hardware innovation, pushing the boundaries of what is possible. Our culture is one of respect and collaboration.

We value humility and believe in direct communication. Our team is inclusive, and our differing perspectives allow for better solutions. We are seeking individuals passionate about tackling challenges and are driven by execution.  Ready to come find your playground? Together, we can help shape the endless possibilities of AI. 

Location:

Hybrid, working onsite at our Santa Clara, CA headquarters 3 days per week.

The role: Analog Design Engineer, Senior Staff

What you will do:

Analog-mixed signal integrated circuit design using (but not limited to) common circuit design tools from Cadence and Synopsis. Design state of the art in-memory-compute engine for artificial intelligence accelerator and Die-Die serial interface for scale-out.

Job scope includes schematic circuit design, system level performance analysis, design test benches for simulations and verifications, guide layout engineers on layout in deep sub-micron process nodes from 7nm and below, and to optimize design and layout to achieve low power design performance over process-voltage-temperature corners and six-sigma Monte-Carlo yield analysis.  

  • Independent minor layout tweaks when necessary.

  • Work with backend engineers on integration of design/layout. 

  • Provide model of circuit for backend verification. 

  • Participate in testboard design for silicon bring up and bench debug or characterization. 

  • To build scripts for silicon bring up and test features.  

What you will Bring:

  • Completed a BS/MS/PhD Preferred degree in Electrical Engineering and BS 9+/MS 7+/PHd 7+ years of related professional experience in high-speed circuit design blocks such as Phase Interpolator, Clocking, PLL designs

• Experience and knowledge of Schematic Capture, Spice Simulations and running Monte-Carlo simulations

• Experience and knowledge of Circuit Layout, Extraction and running back-annotated simulations

• Experience with Channel modeling using Matlab or other tools.

• Participation and contribution in Standard bodies is a plus.

• Must have effective interpersonal and teamwork skills.

• Proficiency in working with cross functional and cross site teams.

• Excellent communication skills

• Demonstrates good analysis and problem-solving skills.

• Must have the ability to multi-task in a fast-paced environment

Equal Opportunity Employment Policy

d-Matrix is proud to be an equal opportunity workplace and affirmative action employer. We’re committed to fostering an inclusive environment where everyone feels welcomed and empowered to do their best work. We hire the best talent for our teams, regardless of race, religion, color, age, disability, sex, gender identity, sexual orientation, ancestry, genetic information, marital status, national origin, political affiliation, or veteran status. Our focus is on hiring teammates with humble expertise, kindness, dedication and a willingness to embrace challenges and learn together every day.

d-Matrix does not accept resumes or candidate submissions from external agencies. We appreciate the interest and effort of recruitment firms, but we kindly request that individual interested in opportunities with d-Matrix apply directly through our official channels. This approach allows us to streamline our hiring processes and maintain a consistent and fair evaluation of al applicants. Thank you for your understanding and cooperation.

Top Skills

Cadence
Synopsis
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The Company
HQ: Santa Clara, CA
102 Employees

What We Do

d-Matrix is building a new way of doing datacenter AI inferencing using in-memory computing (IMC) techniques with chiplet level scale-out interconnects. Founded in 2019, d-Matrix has attacked the physics of memory-compute integration using innovative circuit techniques, ML tools, software and algorithms; solving the memory-compute integration problem, which is the final frontier in AI compute efficiency.

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