Neurophos Benefits Overview

Develops and owns nanofabrication processes for prototype metasurface chips, including multilayer lithography, deposition, etching, planarization, active-layer integration, packaging, and metrology. Characterizes optical and electro-optic device performance, analyzes process data, manages university cleanroom runs, documents recipes and travelers, and feeds as-built measurements into design and modeling. The role also supports mask layout, process transfer to foundries, yield improvement, and mentoring of cleanroom personnel.

Own the end-to-end performance architecture and quantitative modeling of Neurophos’s optical vector-matrix multiplication signal path. Build link and power budgets, model optical, analog, digital, quantization, and algorithmic impairments, allocate accuracy and performance targets, and run Monte Carlo and time-domain simulations. Correlate models with laboratory and silicon measurements, conduct throughput and efficiency trade studies, collaborate across photonic, analog, digital, and software teams, and mentor engineers.

Lead BEOL process integration for an advanced photonic chip at the foundry in Leuven. Own BEOL process flows, SPC/specification management, DOE and process transfers, fault isolation and failure analysis (SEM/FIB/TEM/EDX), and drive yield, reliability, and continuous improvement while coordinating closely with foundry and internal design teams.