Jobs at Arm

Develops verification testbenches, test plans, test suites, and functional coverage for complex IP, subsystems, and SoCs. Collaborates with design teams to review microarchitectural specifications, debug issues, and develop reconfigurable IP features. Uses simulation, formal verification, debugging, and coverage tools while supporting verification documentation and quality targets.

Designs, develops, and verifies IC package layouts for next-generation System-in-Package and SoC products. Responsibilities include high-speed and high-power routing, stack-up creation, reference-plane and power-distribution implementation, feasibility studies, and resolving complex design issues using Cadence APD or SiP tools. The engineer will also improve packaging methodologies, support standardization, evaluate design tradeoffs involving size, cost, and performance, and collaborate with globally distributed teams.

Own end-to-end technical delivery for Arm’s engineering platforms, including requirements, planning, implementation, production support, and on-call incident response. Develop and maintain CI/CD, build, testing, cloud, containerization, infrastructure-as-code, and clustered computing solutions. Improve developer experience through automation, self-service infrastructure, and efficient engineering workflows.

Lead cross-functional engineering teams to plan, schedule, track, and deliver System IP and SoC-related products (CPU, GPU, MMU, GIC, PHY, interconnect). Manage resources, budgets, risks, changes, and dependencies; communicate with product and technical leads; ensure on-spec, high-quality, and timely delivery across the hardware/Soft IP development lifecycle.

Lead system-level product engineering for SoC/CPU/GPU silicon from pre-silicon readiness through post-silicon bring-up. Own manufacturability and SLT manufacturing flow, drive yield improvement, characterization, system-level qualification, failure debug, VF margin validation, and cross-functional coordination with design, packaging, validation, test, software, and partners.

Leads end-to-end product engineering for advanced HPC silicon from pre-silicon readiness through bring-up, qualification, production ramp, and HVM. Owns silicon characterization, performance and power correlation, HSIO validation, manufacturing test, SLT, yield, reliability, failure analysis, and advanced packaging. Partners cross-functionally on productization requirements, risk mitigation, manufacturing readiness, and root-cause resolution. Provides technical leadership, communicates complex issues, establishes product-health metrics, and mentors engineers.

Lead design verification for complex IP, subsystems, and SoCs by establishing verification architecture, creating test plans and methodologies, developing testbenches and test suites, executing functional and coverage verification, reviewing microarchitecture, debugging issues, and coordinating verification teams. The role also develops reconfigurable IP features and collaborates across architecture, design, and engineering teams to deliver product quality and release commitments.

Engineering internship opportunities span hardware and chip design, testing and validation, systems performance, AI and machine learning, software and tools, technical enablement, and technical product programs. Interns may build, test, debug, model, analyze, or improve technical systems using programming, hardware, simulation, data, and engineering tools. Candidates must be enrolled in a relevant technical degree program and return to their studies after the internship.

Arm’s Graduate Engineering Pathways Program offers early-career opportunities across hardware and chip design, testing and validation, systems performance, AI/ML, software tools, technical enablement, and technical product programs. Graduates work on real products, solve technical challenges, learn new technologies, and collaborate with experienced teams. Candidates must be pursuing a relevant technical or quantitative university degree and demonstrate hands-on technical problem-solving through coursework, research, internships, projects, or open-source work.

Leads strategic UX research for AI and developer platforms, studying tools, APIs, runtimes, documentation, workflows, and agent-mediated experiences. The researcher identifies high-value questions, applies qualitative and quantitative methods, influences product and platform direction, and translates insights into design principles and recommendations. Responsibilities include engaging developers, customers, and partners; representing user needs in leadership and roadmap discussions; and mentoring peers to improve evidence-based research practices.

Lead go-to-market strategy and product marketing for Arm’s Cloud AI portfolio, including AGI CPUs, Neoverse CSS, CPU IP, platforms, and ecosystem solutions. Develop positioning, messaging, customer value propositions, marketing plans, product launches, partner campaigns, content, sales enablement, and executive communications. Collaborate with product, engineering, sales, corporate marketing, and ecosystem partners to translate complex AI and cloud infrastructure technologies into differentiated market narratives and accelerate adoption.

Design and integrate PCIe, CXL, and other IP subsystems for SoCs. Develop micro-architecture specifications and RTL, perform design checks, fix bugs, and collaborate with verification, performance, backend implementation, and project management teams. Support floor planning, constraints, timing closure, and design methodology improvements while guiding team members.

Own strategic customer relationships and commercial opportunities for Arm silicon across Physical AI and Edge AI markets. Develop demand, identify lighthouse customers, progress opportunities from evaluation through design wins and deployment, maintain pipeline forecasts, gather market and product insights, and coordinate cross-functional teams. Engage senior business and engineering leaders while communicating Arm’s value in performance, power efficiency, AI capability, security, software ecosystem, and system economics.

Develop functional verification strategies for sophisticated Arm SoCs and compute subsystems. Create test plans, SystemVerilog/Verilog testbenches, and tests; verify PCIe/CXL, DDRx/LPDDRx, HBM, performance, and SoC RTL integration. Debug failures, improve verification methodologies, collaborate on architecture and microarchitecture, support emulation platforms, and guide junior engineers. The role also involves coordinating project activities, plans, and schedules with Project Management.

Senior SoC Verification Engineer role at Arm. The provided posting contains salary and company policy information but no detailed responsibilities or qualification requirements.

The engineer will verify PCIe and CXL subsystems, collaborate on testplans, develop UVM testbenches, and improve verification methodologies.

Architects, implements, and validates design-for-test techniques for Arm SoCs and subsystems. Responsibilities include DFT insertion, RTL and gate-level simulation, ATPG pattern generation, coverage debugging, DFT timing analysis, scan insertion, timing closure, ATE test validation, silicon debug, and characterization. The role collaborates with RTL, verification, physical implementation, test, and product engineering teams throughout development and tape-out.

The Senior/Staff Design Verification Engineer will be responsible for design verification in coherent interconnects. Specific responsibilities are not detailed, but expertise in this area is expected.

Develop and improve front-end ASIC/SoC build methodologies, CAD flows, and automation from RTL development through implementation handoff. Build production-quality infrastructure for RTL quality, verification, IP management, regression, and release readiness. Collaborate with engineering teams and EDA vendors to resolve bottlenecks, evaluate AI and automation technologies, and drive methodology adoption across projects.

Architect and design high-volume SoC platforms using Arm IP across mobile, automotive, datacenter, networking and IoT. Lead cross-functional teams to define platform architecture, optimize performance and power, coordinate IP delivery, drive partner engagements, and influence roadmap and feature development. Guide specification maturity and ensure on-time delivery while driving innovation and continuous improvement.