Jobs at Arm

Lead strategic enterprise accounts and executive relationships for Arm’s semiconductor IP solutions. Drive customer engagement, identify licensing and design opportunities, manage complex negotiations, coordinate cross-functional teams, maintain sales pipelines and forecasts, and expand long-term customer partnerships across the Bay Area technology ecosystem.

Oversee global equity compensation administration across 20+ countries, including RSUs, PSUs, ESPP, and future SAYE programs. Manage tax compliance, payroll coordination, China SAFE requirements, SOX controls, reconciliations, audits, executive equity reporting, vendors, and corporate transaction workstreams. Partner cross-functionally with Finance, Tax, Legal, Payroll, IT, and external providers while improving employee experience. Lead technology, AI, automation, data quality, and process enhancements to create scalable, accurate operations.

Leads complex semiconductor and engineering development programs from definition through integration, validation, and delivery. Owns project execution, schedules, dependencies, risks, resources, scope changes, metrics, and recovery plans. Coordinates cross-functional engineering teams and technical leads across disciplines and locations, resolves delivery challenges, influences stakeholders without direct authority, and communicates progress and trade-offs to senior leadership. Projects may involve semiconductor IP, SoCs, FPGAs, emulation platforms, boards, validation, and hardware/software enablement.

Develop and maintain high-speed software models of Arm SoC hardware and IP. Build virtual platforms supporting Linux and Android software development, debugging, and memory transaction inspection. Collaborate with hardware and software engineers to accurately model IP, integrate software, diagnose issues, and provide feedback on SoC designs.

Develop and scale automated manufacturing test solutions for board and system-level Arm-based products. Responsibilities include designing test strategies and fixtures, developing Python and Bash test automation, improving test coverage and yield, debugging hardware and software issues, supporting product bring-up and high-volume manufacturing, analyzing manufacturing data, and collaborating with hardware, software, quality, manufacturing, and external manufacturing partners.

Design and integrate complex SoC compute subsystems, including PCIe, DDR, HBM, UCIe, and Ethernet IP. Develop micro-architecture specifications and RTL, perform design checks, debug issues, and collaborate with verification, performance, and backend implementation teams. Support floor planning, timing closure, power management, and design methodology improvements. Guide team members and coordinate project activities, plans, and schedules.

Represent Arm’s Strategic Ventures team in Silicon Valley by identifying emerging technologies and companies, assessing their technical, strategic, and commercial potential, and recommending partnership, investment, or monitoring opportunities. Build relationships with founders, investors, technology leaders, and research organizations while collaborating with global technical and commercial teams to develop promising opportunities.

Develop verification plans, SystemVerilog/UVM testbenches, constrained-random stimulus, coverage, and regression strategies for Arm's coherent interconnect products. Collaborate with architects and designers to debug features, resolve functional failures, close coverage, and improve verification methodologies. The role requires CPU microarchitecture expertise, including cache coherence, memory systems, and AMBA bus protocols.

Leads product strategy and lifecycle management for Arm’s Physical AI portfolio serving automotive, robotics, and industrial compute markets. Defines positioning, roadmaps, requirements, business cases, launches, and marketing materials while coordinating engineering, sales, marketing, field applications, partners, and customers. The role requires automotive or robotics product management experience, system-level lifecycle knowledge, and technical understanding of CPUs, GPUs, AI processors, semiconductor platforms, and heterogeneous system-on-chip architectures.

Build and operate Arm’s production AI platform infrastructure, including MCP servers, model gateways, runtime services, and control-plane components. Develop scalable, secure, observable, and cost-aware platform patterns using Kubernetes, cloud infrastructure, infrastructure as code, and GitOps. Responsibilities include automation, monitoring, incident response, reliability engineering, secrets and identity management, network controls, auditability, lifecycle management, and participation in an on-call rotation.

This role focuses on enhancing developer experience through improved tools and solutions, collaborating with developers and engineering teams, and managing product roadmaps for performance tooling.

Design and build MLOps infrastructure for production deployment of data, machine-learning models, and software. Develop end-to-end ML pipelines, CI/CD/CT workflows, secure repository strategies, containerized deployments, and automation for Edge AI applications. Collaborate with developers, data scientists, and ML engineers to define tooling, monitor DevOps performance, and improve operational efficiency. Support embedded-system CI/CT, open-source pipelines, and model testing.

Leads architecture and hands-on development of distributed AI inference runtime capabilities, including scheduling, batching, KV-cache management, memory allocation, kernel optimization, model execution, and performance benchmarking. Partners with infrastructure, compiler, hardware, cloud, and research teams to improve latency, throughput, reliability, and resource efficiency. Provides technical leadership, conducts reviews, mentors engineers, and establishes performance-engineering practices for production AI workloads.

Define next-generation Arm CPU microarchitecture for Cortex-X and Neoverse processors. Develop performance models, analyze workloads, evaluate innovations with cycle-accurate and functional simulators, and assess performance, power, and area trade-offs. Collaborate with CPU design teams and ecosystem partners, communicate technical findings, mentor engineers, and improve methodologies and tools.

Coordinate third-party IP delivery and lifecycle management across semiconductor programs. Track vendor commitments, procurement readiness, schedules, risks, dependencies, and recovery plans. Partner with engineering, procurement, quality, legal, finance, program management, and suppliers to resolve blockers and support leadership reporting. Improve IP lifecycle processes, reporting tools, and workflows while ensuring delivery and compliance readiness.

Develop and operate software infrastructure supporting Arm CPU design and verification. Build automation for distributed HPC workloads, CI and regression systems, observability, source-control and verification-tool integrations. Diagnose complex issues across software, hardware verification, operating systems, compute, and storage. Improve compute utilization, verification throughput, failure analysis, and engineering workflows while delivering maintainable production-quality software.

The Staff Field Application Engineer drives adoption of Arm server SoCs, providing technical support, performance analysis, and training to customers while collaborating with internal teams on system integration and optimization.

Provides independent quality oversight for CPU development across requirements, design, verification, release, and maintenance. Leads quality reviews, defect investigations, root-cause analysis, corrective actions, and errata resolution. Uses quality data and customer feedback to identify trends, improve verification effectiveness, strengthen engineering practices, and simplify development processes. Collaborates with engineering teams and contributes to review boards and cross-team improvement initiatives.

Lead product strategy and lifecycle for Physical IP and CPU products targeting Edge AI. Define roadmaps, translate market and customer insights into engineering requirements, drive competitive positioning, and engage Tier 1 customers to secure design wins. Collaborate cross-functionally with engineering, sales, marketing, and executives to influence CPU roadmap, deliver commercial cases, and ensure customer success.

Designs security architectures for system-on-chip products, including root of trust, secure boot, key management, confidential computing, authentication, encryption, secure manufacturing, and device lifecycle management. Responsibilities include threat modeling, cryptographic and hardware/software security analysis, access control design, secure privilege management, isolation, attestation, and recovery mechanisms. The role also contributes to technology roadmaps and leads multinational security teams.