Jobs at Arm

Develop and support ECAD tools, automation, methodologies, and libraries for advanced 2.5D and 3D package designs. Coordinate with internal teams and ECAD vendors, improve layout efficiency, support signal and power delivery analysis, develop CAD libraries, and provide tool-use support. The role also includes custom tool deployment, product support, regression testing, documentation, and training for large-scale SoC design environments.

Optimize production AI workloads on Arm edge devices for performance and power efficiency. Develop kernel- and system-level implementations for DNN models using AI optimization tools and profiling techniques. Create production reference implementations and technical documentation, diagnose complex customer performance issues, and collaborate across engineering teams. Translate technical findings into recommendations for engineers and senior leadership while influencing Arm’s IP and software roadmaps.

Supports the Chief Marketing Officer by managing a complex global calendar, coordinating meetings, executive travel, events, offsites, materials, expenses, and follow-up. Partners with the CMO’s Chief of Staff, Marketing Leadership Team, executive assistants, and internal and external stakeholders. The role requires discretion, exceptional organization, proactive judgment, strong communication, and expert proficiency with Microsoft productivity tools.

Conduct original robotics research across areas such as robot learning, perception, planning, control, safety, systems, and mechatronics. Develop and implement novel methods on real robots and in simulation, integrate capabilities into intelligent systems, publish research, identify system-level requirements, and collaborate with multidisciplinary researchers and external partners to shape Arm’s robotics technology roadmap.

Conduct original robotics research across learning, perception, planning, control, safety, systems, and mechatronics. Develop and evaluate methods on real robotic platforms and simulations, integrate multidisciplinary capabilities into intelligent systems, publish research, identify system-level bottlenecks, and influence the technical roadmap for future robotics compute and software platforms.

Build and operate scalable platform services and APIs that improve engineering workflows. Develop Kubernetes operators, automate self-service capabilities, provision cloud infrastructure with Terraform, and manage reliable workloads using AWS, Docker, Kubernetes, Helm, and ArgoCD. Lead technical initiatives, apply secure software engineering practices, support production systems, and participate in an on-call rotation while collaborating across engineering teams.

Design and integrate complex compute subsystems and SoCs, including PCIe, DDR, HBM, UCIe, and Ethernet IP. Develop micro-architecture specifications and RTL, perform design checks, debug issues, and collaborate with verification, performance, backend implementation, and project management teams. Support floor planning, timing closure, design methodologies, and team development while guiding other engineers.

Provide technical mentorship and support to partners integrating Arm CPUs and System IP into SoCs. Perform RTL simulation-based debugging, SoC build reviews, deliver training, influence IP development, test IP, and create knowledge-base content and tooling to improve partner outcomes.

Senior Verification Engineer responsible for verifying sophisticated Arm SoC compute subsystems. Duties include reviewing architecture, creating verification strategies and test plans, developing SystemVerilog and Verilog testbenches, debugging failures, and verifying PCIe/CXL, DDRx/LPDDRx, and HBM integrations. The role contributes to verification methodology improvements, performance verification, cross-team design collaboration, project planning, and mentoring junior engineers. Experience with low-level C and Assembly programming is required, while formal verification, scripting, power-aware verification, and emulation experience are preferred.

Design and implement SystemVerilog RTL for memory controller functional units. Develop specifications and microarchitecture, collaborate with design and verification teams, debug functional and performance issues, and meet performance, power, and area targets. The role requires knowledge of DRAM standards, AMBA bus protocols, RTL design, synthesis, and design-quality checks such as lint and CDC analysis.

Develop and deploy Raven, a C++ dynamic random test generator for Arm CPU verification. Responsibilities include implementing verification functionality, creating test templates for architectural and microarchitectural features, debugging user and QA issues, collaborating with CPU verification engineers, and applying computer architecture specifications. The role requires strong C++ development, assembly programming, computer architecture knowledge, and familiarity with CPU verification environments.

Leads strategic UX research for AI and developer platforms, studying tools, APIs, runtimes, documentation, workflows, and agent-mediated experiences. The researcher identifies high-value questions, applies qualitative and quantitative methods, influences product and platform direction, and translates insights into design principles and recommendations. Responsibilities include engaging developers, customers, and partners; representing user needs in leadership and roadmap discussions; and mentoring peers to improve evidence-based research practices.

Develop system-level stress workloads and validation tests for Arm SoC processors in Linux and bare-metal environments. Characterize silicon, debug system and silicon issues, create test plans, and perform root-cause analysis using laboratory and debugging equipment. The role requires pre- and post-silicon validation experience, software engineering skills in C/C++, ARM assembly, Python, and scripting, plus knowledge of power, performance, and hardware interfaces.

Develop reusable Python-based software infrastructure for post-silicon validation and characterization of Arm SoCs. Build automation, frameworks, APIs, and CI or regression infrastructure for workloads, hardware controls, instrumentation, test execution, and data collection. Collaborate with firmware, validation, systems, and infrastructure teams to debug complex hardware-software interactions and create reliable, scalable engineering workflows.

Characterize and validate DDR/LPDDR memory subsystems in next-generation Arm SoCs across process, voltage, temperature, and frequency conditions. Develop system-level stress workloads and test plans for Linux and bare-metal environments, analyze characterization data, debug silicon and system issues, and improve performance. Collaborate with post-silicon validation teams and cross-functional engineering groups while evaluating memory stability, operating margins, failure behavior, and silicon performance.

Characterize and validate PCIe interfaces on next-generation Arm SoCs across process, voltage, temperature, and frequency conditions. Develop system-level stress workloads and characterization tests in Linux and bare-metal environments, analyze silicon performance data, debug PCIe and system issues, and collaborate with validation teams to improve silicon performance and resolve defects.

Develop cycle-accurate performance models for coherent and non-coherent Arm interconnects. Collaborate with micro-architects, RTL, validation teams, and customers to assess architectural trade-offs, develop features, build performance test suites, identify bottlenecks, and deliver data-driven system performance insights. The role requires strong C++, SystemC TLM, and Python skills, plus expertise in SoC performance modeling and computer architecture.

Designs, verifies, and optimizes 2.5D and 3D system-in-package layouts for next-generation SoCs. Responsibilities include package routing, bump-map and ball-pattern optimization, stack-up and power-distribution design, feasibility studies, DFM/DFA implementation, vendor coordination, methodology development, and mentoring team members using Cadence APD and SiP tools.

Coordinates electronic prototype and PCB new product introductions from design readiness through manufacturing and testing. Works with engineering, procurement, suppliers, and contract manufacturers to ensure materials, tooling, documentation, test strategies, and schedules are aligned. Supports DFM/DFA reviews, drives build issue resolution and root-cause analysis, maintains NPI documentation, manages supplier and manufacturing risks, and improves build quality and readiness. Travel to manufacturing locations may be required.

Leads project management across AI and Developer Platforms, establishing scalable operating models, planning frameworks, governance, risk management, and delivery standards. Manages and develops a distributed Project Management team, oversees portfolio and execution rhythms, aligns cross-functional stakeholders, resolves trade-offs, and provides leadership visibility into progress, dependencies, risks, resources, and outcomes. Uses data, automation, dashboards, and AI to improve delivery efficiency and organizational decision-making.