Arago Inc. Benefits Overview

Develop verification plans and UVM-based testbenches for digital and mixed-signal optical chips. Verify PCIe interfaces, RISC-V processors, and ASIC designs through simulation, formal verification, coverage analysis, regression testing, and SDF back-annotated netlist simulations. Collaborate with architects, designers, and customers, support FPGA/ASIC bring-up and post-silicon validation, and debug issues throughout the development lifecycle.

Own end-to-end technical sourcing for advanced semiconductor and AI hardware roles. Build targeted talent searches, map technical talent pools, craft outreach to passive candidates, and develop long-term relationships. Partner with hiring managers and founders to understand complex technical requirements and create customized sourcing strategies. Use GitHub, LinkedIn, referrals, research communities, and X-Ray search. Track candidate pipelines, metrics, and funnel data while managing multiple complex searches with high quality.

Own mixed-signal verification methodology, planning, and execution for digital-to-analog interfaces on SoCs. Build verification environments at block, subsystem, and SoC levels; develop tests, assertions, checkers, scoreboards, and coverage; verify analog control and configuration across operating conditions; run regressions, debug failures, and drive coverage to sign-off. Collaborate with analog, RTL, architecture, firmware, and SoC verification teams, and develop behavioral or real-number models for mixed-signal simulation.