Sr Physical Design Engineer

Posted 5 Hours Ago
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Bangalore, Bengaluru Urban, Karnataka, IND
In-Office
Senior level
Artificial Intelligence • Hardware • Automation • Manufacturing
The Role
Lead physical verification and power-integrity signoff for block and full-chip mixed-signal designs. Perform DRC/LVS/PEX/PERC/ERC, antenna, density/DFM checks, and EM/IR drop analysis. Develop automation and scripts (Python, Tcl, Shell, SKILL), drive tapeout readiness, collaborate with layout/circuit/CAD/foundry teams, and mentor junior engineers.
Summary Generated by Built In

About Analog Devices

Analog Devices, Inc. (NASDAQ: ADI) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, AI, and software technologies into solutions that combat climate change, reliably connect humans and the world, and help drive advancements in automation and robotics, mobility, healthcare, energy and data centers. With revenue of more than $11 billion in FY25, ADI ensures today's innovators stay Ahead of What's Possible. Learn more at www.analog.com and on LinkedIn and X.

          

  • Own and drive full-chip and block-level PV signoff activities.
  • Perform and debug:
    • Design Rule Check (DRC)
    • Layout Versus Schematic (LVS)
    • Parasitic Extraction (PEX)
    • PERC/ERC checks
    • Antenna verification
    • Density and DFM checks
  • Analyze and resolve complex PV violations while maintaining schedule commitments.
  • Review and implement foundry rule deck updates.
  • Work with layout and design teams to achieve clean signoff.
  • Develop methodologies and automation to improve PV productivity and turnaround time.
  • Support tapeout readiness reviews and signoff documentation.
  • Perform Electromigration (EM) and IR Drop analysis on digital, analog, and mixed-signal designs.
  • Define power integrity verification strategies for blocks and full-chip designs.
  • Analyze static and dynamic IR drop issues and recommend corrective actions.
  • Debug EM violations and optimize power grid structures.
  • Correlate simulation results with design requirements and reliability specifications.
  • Collaborate with circuit, package, and PD teams for power delivery optimization.
  • Track and close reliability signoff requirements before tapeout.
  • Develop scripts and utilities using Python, Tcl, Shell, or SKILL to automate PV and EMIR flows.
  • Develop dashboards and reporting mechanisms for signoff metrics.
  • Drive continuous improvements in PV and EMIR methodology.
  • Interface with:
    • Physical Design teams
    • Layout teams
    • Circuit designers
    • CAD/EDA teams
    • Foundry support teams
  • Participate in design reviews, signoff reviews, and tapeout planning meetings.
  • Mentor junior engineers and provide technical guidance.

 

For positions requiring access to technical data, Analog Devices, Inc. may have to obtain export  licensing approval from the U.S. Department of Commerce - Bureau of Industry and Security and/or the U.S. Department of State - Directorate of Defense Trade Controls.  As such, applicants for this position – except US Citizens, US Permanent Residents, and protected individuals as defined by 8 U.S.C. 1324b(a)(3) – may have to go through an export licensing review process.

Analog Devices is an equal opportunity employer. We foster a culture where everyone has an opportunity to succeed regardless of their race, color, religion, age, ancestry, national origin, social or ethnic origin, sex, sexual orientation, gender, gender identity, gender expression, marital status, pregnancy, parental status, disability, medical condition, genetic information, military or veteran status, union membership, and political affiliation, or any other legally protected group.

Job Req Type: Experienced

          

Required Travel: Yes, 10% of the time

          

Shift Type: 1st Shift/Days

Skills Required

  • Own and drive full-chip and block-level physical verification signoff activities.
  • Perform and debug DRC, LVS, Parasitic Extraction (PEX), PERC/ERC, antenna verification, density and DFM checks.
  • Analyze and resolve complex PV violations while meeting schedule commitments.
  • Review and implement foundry rule deck updates and interface with foundry support teams.
  • Work with layout and design teams to achieve clean signoff.
  • Develop methodologies and automation to improve PV productivity and turnaround time.
  • Support tapeout readiness reviews and prepare signoff documentation.
  • Perform Electromigration (EM) and IR Drop analysis on digital, analog, and mixed-signal designs.
  • Define power integrity verification strategies for blocks and full-chip designs; analyze static and dynamic IR drop issues.
  • Debug EM violations and optimize power grid structures.
  • Correlate simulation results with design requirements and reliability specifications.
  • Develop scripts and utilities using Python, Tcl, Shell, or SKILL to automate PV and EMIR flows.
  • Develop dashboards and reporting mechanisms for signoff metrics and drive continuous methodology improvements.
  • Collaborate with circuit, package, PD, layout, and CAD/EDA teams.
  • Mentor junior engineers and provide technical guidance.

Analog Devices Compensation & Benefits Highlights

The following summarizes recurring compensation and benefits themes identified from responses generated by popular LLMs to common candidate questions about Analog Devices and has not been reviewed or approved by Analog Devices.

  • Retirement Support The 401(k) program is described as a standout feature, with company contribution up to 8% of base salary and immediate vesting. This structure strengthens long-term value even when cash compensation perceptions vary.
  • Healthcare Strength Health coverage is positioned as comprehensive, including medical, dental, and vision options along with disability and life insurance. Day-one eligibility and multiple plan choices add to perceived robustness.
  • Leave & Time Off Breadth Paid time off appears broad, with vacation ranging from roughly 17–25 days and increasing up to five weeks with tenure, alongside sick time and paid holidays. Parental leave and related time-off provisions further expand coverage.

Analog Devices Insights

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The Company
HQ: Wilmington, MA
20,292 Employees
Year Founded: 1965

What We Do

Analog Devices, Inc. (NASDAQ: ADI) operates at the center of the modern digital economy, converting real-world phenomena into actionable insight with its comprehensive suite of analog and mixed signal, power management, radio frequency (RF), and digital and sensor technologies. ADI serves 125,000 customers worldwide with more than 75,000 products in the industrial, communications, automotive, and consumer markets. ADI is headquartered in Wilmington, MA.

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