Director, SI/PI

Posted One Month Ago
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Santa Clara, CA, USA
In-Office
Senior level
Artificial Intelligence • Hardware • Semiconductor • Generative AI
The Role
Direct system-level Signal Integrity and Power Integrity architecture, analysis, simulation, and optimization for a next-generation MPU. The role covers high-speed serial and memory interfaces, including DDR5 and LPDDR, correlates simulations with lab measurements, resolves silicon-to-system integrity issues, and collaborates across silicon, package, PCB, architecture, and manufacturing teams. It also evaluates future package and PCB technologies and provides technical leadership and mentorship.
Summary Generated by Built In
About Netpreme

The biggest bottleneck in AI systems today is memory. Chips compute faster than they can be fed data—a problem known as the memory wall—and Netpreme is building the solution that allows AI memory to scale independently of AI compute. Our approach spans the full stack, from a proprietary memory management framework at the XPU kernel and OS levels to X-Mem™, the world’s first Memory Processing Unit (MPU) silicon. Founded by MIT researchers at the intersection of optical networking, ML systems, and GPU kernel optimization, we’re based in Cambridge, MA, and Santa Clara, CA. We’re looking for people who want to own hard problems end to end—and help shape the next generation of AI systems.

Click here to read out latest blog!

About the Role

We are seeking a Director to drive Signal Integrity, Power Integrity of our first generation MPU. It involves all aspects for SI/PI from silicon to system.

This role will be performed onsite from one of our offices in Santa Clara, CA or Boston, MA.

The Opportunity
  • Impact: AI is advancing faster than the infrastructure underneath it. We’re working at that layer, unlocking more capability from every GPU while dramatically improving efficiency. The work you do here compounds across state-of-the-art models, systems, and real-world applications.

  • Timing: Joining now means real ownership, including equity, and a direct say in product direction. You’ll work from first principles, move quickly from insight to execution, and see your work show up in what we ship, not just in a roadmap.

  • Culture: We care about rigor, clarity, and impact. Disagreement is welcome when it’s thoughtful, the best idea wins regardless of who it comes from, and you’ll learn something new most weeks.

Your Impact
  • Responsible for technical solution development for Signal Integrity and Power Integrity.

  • Drive system-level SI/PI architecture, design guidelines, and layout recommendations.

  • Perform end-to-end channel simulations for high-speed serial interfaces and memory subsystems.

  • Lead SI/PI analysis and optimization of DDR5, LPDDR5, LPDDR6, and other high-performance memory interfaces.

  • Correlate simulations with lab measurements and drive root-cause analysis of signal and power integrity issues.

  • Collaborate with silicon, package, PCB, architecture, and manufacturing teams to resolve complex SI/PI challenges.

  • Evaluate future package and PCB technologies to support next-generation FPGA and adaptive computing products

Qualifications
  • MS or PhD in Electrical Engineering

  • 5+ years of direct industry experience

Nice To Have
  • Excellent analytical and problem-solving skills with strong attention to detail.

  • Proven ability to independently drive technical decisions and influence engineering direction.

  • Strong communication and cross-functional collaboration skills.

  • Hands-on experience performing lab measurements and correlating hardware results to simulation models.

  • Deep expertise in Signal Integrity with working knowledge of Power Integrity concepts and methodologies.

  • Experience with DDR, LPDDR, or other high-performance memory interfaces.

  • Experience with FPGA, adaptive computing, ASIC, networking, datacenter, or high-performance computing platforms.

  • Experience with PCB, package, and IC-level power delivery networks.

  • Expertise with SI/PI analysis tools including ADS and HFSS; experience with HSPICE is a plus.

  • Strong foundation in electromagnetic theory, transmission lines, and circuit analysis.

  • Experience mentoring engineers and driving technical leadership across organizations.

  • Experience with programming in Python, C++, Matlab.

What We Offer
  • Competitive salary with performance-based bonus and early-stage equity grant

  • 100% employer-paid Health, Dental, and Vision coverage for you and your dependents

  • 401(k) match with immediate vesting, and access to financial advisors to help you reach your financial goals

  • 100% employer-paid Life, Disability, and AD&D insurance, plus a fitness stipend and wellness & mental health perks

  • Generous PTO: 20 vacation days, 15 company holidays (including 3 floating days of your choosing)

  • Daily lunch stipend

  • Enterprise-level Claude & ChatGPT access with a generous token budget

  • Well-equipped, sunny offices in Santa Clara, CA & Cambridge, MA with on-site parking and EV charging; on-site fitness center in Santa Clara; gym discounts near our Cambridge office

  • Visa sponsorship and relocation assistance to one of our office hubs

  • A collaborative, continuous-learning environment with smart, dedicated colleagues building the next generation of high-performance computing architecture

Skills Required

  • MS or PhD in Electrical Engineering
  • 5+ years of direct industry experience
  • Strong analytical and problem-solving skills
  • Ability to independently drive technical decisions and influence engineering direction
  • Strong communication and cross-functional collaboration skills
  • Hands-on experience with lab measurements and correlating hardware results to simulation models
  • Deep expertise in Signal Integrity and working knowledge of Power Integrity
  • Experience with DDR, LPDDR, or other high-performance memory interfaces
  • Experience with FPGA, adaptive computing, ASIC, networking, datacenter, or high-performance computing platforms
  • Experience with PCB, package, and IC-level power delivery networks
  • Expertise with SI/PI analysis tools including ADS and HFSS; HSPICE experience is a plus
  • Strong foundation in electromagnetic theory, transmission lines, and circuit analysis
  • Experience mentoring engineers and driving technical leadership across organizations
  • Programming experience with Python, C++, or MATLAB
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The Company
10 Employees
Year Founded: 2024

What We Do

Netpreme develops memory-to-compute interconnect solutions for generative AI systems, aiming to expand memory bandwidth and capacity, enhance efficiency, and reduce costs.

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