About the Role
We are seeking a Director of ASIC Verification who leads from the front: you'll own verification strategy, sign-off, and the team — and you'll also be one of the strongest hands-on verification engineers here, writing testbenches, closing coverage, and debugging the hardest failures.
This role will be performed onsite from our office in Santa Clara, CA.
Essential Duties & Responsibilities
Own verification end-to-end: strategy, methodology (UVM, formal, emulation, coverage-driven closure), tape-out sign-off for Netpreme silicon, IP, subsystems and post silicon bringup support including test-vector generation.
Architect and author verification environments and testplans, review testbench code line-by-line, and personally drive debug of the hardest protocol, coverage, and bring-up issues
Recruit, lead, and develop a world-class verification organization that treats technical depth as the currency
Present verification readiness, metrics, and risk posture to engineering
leadership with conviction
Qualifications
BS/MS in Electrical Engineering, Computer Engineering, or related field.
8+ years of progressive ASIC/SOC verification, with 5+ years leading verification teams
Demonstrable experience writing verification code, building testbenches, and closing coverage
Multiple tapeouts in advanced process nodes where you owned both deep technical work and sign-off
Hands-on experience with high-speed protocol IP — Ethernet, UCIe, UALink, or comparable
Fluent across the full ASIC/SOC lifecycle — microarchitecture through tape-out — on designs integrating interconnect, I/O, and memory subsystems
Executive communication skills; proven ability to manage risk, escalations, budget, and headcount on startup timelines
Preferred Qualifications
PhD in EE, CE, or related field
Built a verification team from zero at an early-stage startup while delivering milestones personally
Hands-on post-silicon bring-up, debug, and validation leadership
AI/datacenter accelerator background; familiarity with LLM memory/dataloader bottlenecks
Knowledge of DFT and its interaction with front-end verification
Compensation & Benefits
Competitive salary with performance-based bonus and early-stage equity grant
100% employer-paid Health, Dental, and Vision coverage for you and your dependents
401(k) match with immediate vesting, and access to financial advisors to help you reach your financial goals
100% employer-paid Life, Disability, and AD&D insurance, plus a fitness stipend and wellness & mental health perks
Generous PTO: 20 vacation days, 15 company holidays (including 3 floating days of your choosing)
Daily lunch stipend
Enterprise-level Claude & ChatGPT access with a generous token budget
Well-equipped, sunny offices in Santa Clara, CA & Cambridge, MA with on-site parking and EV charging; on-site fitness center in Santa Clara; gym discounts near our Cambridge office
Visa sponsorship and relocation assistance to one of our office hubs
A collaborative, continuous-learning environment with smart, dedicated colleagues building the next generation of high-performance computing architecture
The Opportunity
Impact: Humanity stands at the dawn of a new industrial revolution driven by AI—one with the potential to redefine how we live on this planet. We are tackling a fundamental challenge at the infrastructure layer: unlocking greater AI capability while dramatically improving efficiency. The work we do here compounds across state-of-the-art AI models, systems, and real-world applications.
Timing: Breakthrough technology matters most when it meets the right time. Joining now means real ownership of the company and meaningful influence over product direction and execution. In this early-stage environment, your ideas shape the trajectory of the technology—not just its implementation. You’ll work from first principles, move quickly from insight to execution, and see your contributions directly reflected in what we build.
Culture: You’ll work alongside a group of people who care deeply about rigor, clarity, and impact. We value thoughtful disagreement, fast learning, and intellectual fearlessness. This is a place where strong ideas shine, curiosity is encouraged, and growth is a daily practice—not a future promise.
Skills Required
- BS or MS in Electrical Engineering, Computer Engineering, or a related field
- 8+ years of progressive ASIC or SoC verification experience
- 5+ years leading verification teams
- Experience writing verification code, building testbenches, and closing coverage
- Experience with multiple advanced-process-node tapeouts, including technical ownership and sign-off
- Hands-on experience with high-speed protocol IP such as Ethernet, UCIe, UALink, or comparable protocols
- Experience across the ASIC/SoC lifecycle from microarchitecture through tape-out, including interconnect, I/O, and memory subsystems
- Executive communication skills and experience managing risk, escalations, budget, and headcount
- PhD in Electrical Engineering, Computer Engineering, or a related field
- Experience building a verification team from zero at an early-stage startup while delivering milestones personally
- Hands-on post-silicon bring-up, debug, and validation leadership
- AI or datacenter accelerator background and familiarity with LLM memory or dataloader bottlenecks
- Knowledge of DFT and its interaction with front-end verification
What We Do
Netpreme develops memory-to-compute interconnect solutions for generative AI systems, aiming to expand memory bandwidth and capacity, enhance efficiency, and reduce costs.
