Compiler Optimization Engineer

Posted 4 Hours Ago
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Hiring Remotely in Cañada De Pala, CA, USA
In-Office or Remote
Mid level
Artificial Intelligence • Machine Learning • Software
The Role
Design, implement, and maintain graph-level optimization passes (fusion, layout, dead code elimination, constant folding). Evolve IR, analyze performance to improve throughput and latency, collaborate with front-end and backend teams, prototype new optimization strategies, and contribute to testing/validation to ensure correctness across models and hardware.
Summary Generated by Built In
About Us

At Lemurian Labs, we're reimagining the foundations of computing to make AI accessible to everyone. Our mission is to remove the limits of scale, hardware, and cost that hold back innovation, so the people solving humanity's hardest problems can move faster.

We're building a new kind of software stack: a hardware-agnostic platform that makes every system — from a laptop to a supercomputer — feel like one seamless engine. Developers can write once, run anywhere, and get state-of-the-art performance across any chip, any cloud, at any scale. It's a complete rethink of how software and hardware interact — designed for the era beyond Moore's Law.

We're not looking for the comfortable or the conventional; we're looking for the bold. The engineers who crave frontier problems, who want to bend the limits of what's possible, who see infrastructure not as a constraint but as a canvas. If you want to build the foundation for the next era of AI and change what humanity can achieve in the process, join us.

About the Role

We're looking for a Graph Optimization Compiler Engineer to own the middle tier of our AI compiler stack — the layer where high-level model graphs are transformed, simplified, and made ready for efficient code generation. You'll design and implement the optimization passes that make the difference between a model that runs and a model that flies.

This role sits between our compiler front end and code generation backend. You'll work on graph-level transformations — fusion, layout optimization, dead code elimination, constant folding, and more — with a direct line of sight to the performance outcomes your work produces. If you think in data flow graphs and optimization passes, and you want that thinking to power the next generation of AI infrastructure, we'd love to talk.

What You'll Do
  • Design, develop, and maintain the graph optimization layer of our heterogeneous AI compiler
  • Implement and extend graph-level transformation passes including operator fusion, layout propagation, dead code elimination, constant folding, and algebraic simplification
  • Define and evolve our intermediate representation (IR) to support new optimization opportunities as ML model architectures advance
  • Analyze performance data to identify optimization gaps and drive measurable improvements in throughput and latency
  • Collaborate with front end and code generation teams to ensure clean IR interfaces and well-structured optimization pipelines
  • Propose and prototype new optimization strategies in response to advances in model design and hardware capabilities
  • Contribute to testing and validation infrastructure to ensure optimization correctness across model types and hardware targets
RequirementsEssential Skills and Experience
  • BS degree in Computer Science, Computer Engineering, or equivalent practical experience
  • 4+ years of experience working with compilers, with a focus on intermediate representation design or optimization passes
  • Deep knowledge of graph-level compiler optimization techniques — fusion, tiling, layout transformations, and related methods
  • 4+ years of experience with C/C++
  • Strong written and verbal communication skills; ability to write clear and concise technical documentation
Preferred Skills and Experience
  • Master's or PhD in Computer Science, Computer Engineering, or equivalent
  • Experience with polyhedral models or affine analysis for loop and tensor optimization
  • Familiarity with hardware memory hierarchies and how layout decisions impact performance on GPUs or accelerators
  • Experience working with MLIR, XLA, or similar graph-level IR frameworks
  • Experience with ML framework internals — PyTorch eager/compile mode, JAX/XLA, or TensorRT
  • Strong understanding of ML model architectures and their computational patterns (attention, convolution, normalization, etc.)
  • Knowledge of quantization, sparsity, or other model-level optimization techniques
  • Contributions to open-source compiler or ML infrastructure projects
Why Join Lemurian Labs
  • Own a critical layer of our compiler stack where optimization decisions have direct, measurable impact on model performance
  • Work on the hardest graph-level problems in AI infrastructure — across diverse hardware targets and model architectures
  • Collaborate with a team that treats infrastructure as a canvas and optimization as a craft
  • Competitive compensation including equity, medical/dental/vision, retirement savings, and wellness benefits

Lemurian Labs is an equal opportunity employer. We celebrate diversity and are committed to creating an inclusive environment for all employees, regardless of gender identity, race, ethnicity, sexual orientation, disability status, age, or background.

Compensation depends on experience and geographic location and will be narrowed during the interview process. Additional benefits include equity, company bonus opportunities, medical, dental, and vision coverage, a retirement savings plan, and supplemental wellness benefits.

Skills Required

  • BS degree in Computer Science, Computer Engineering, or equivalent practical experience
  • 4+ years of experience working with compilers, focusing on intermediate representation design or optimization passes
  • Deep knowledge of graph-level compiler optimization techniques such as fusion, tiling, and layout transformations
  • 4+ years of experience with C/C++
  • Strong written and verbal communication skills and ability to write clear technical documentation
  • Master's or PhD in Computer Science, Computer Engineering, or equivalent
  • Experience with polyhedral models or affine analysis for loop and tensor optimization
  • Familiarity with hardware memory hierarchies and how layout decisions impact performance on GPUs or accelerators
  • Experience working with MLIR, XLA, or similar graph-level IR frameworks
  • Experience with ML framework internals such as PyTorch eager/compile mode, JAX/XLA, or TensorRT
  • Strong understanding of ML model architectures and computational patterns (attention, convolution, normalization)
  • Knowledge of quantization, sparsity, or other model-level optimization techniques
  • Contributions to open-source compiler or ML infrastructure projects
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The Company
HQ: Toronto
33 Employees
Year Founded: 2018

What We Do

At Lemurian Labs our focus is on unleashing the capabilities of AI for the benefit of humanity. To fulfill this purpose we are developing a full stack solution consisting of software and hardware that is capable of orders of magnitude better performance and efficiency than legacy solutions, while being designed for scalability. There are massive shifts underway moving us from Software 1.0 to Software 2.0 to Software 3.0 and onwards, but to realize its true benefits we need fundamentally new hardware and systems that can keep up with the changing compute demands and simultaneously bringing down costs. We are developing software and hardware designed from first principles to deliver unprecedented realizable performance/watt and enable the next generation of AI workloads. Our diverse team of technologists have decades of experience at the frontiers of high performance computing, digital arithmetic, cryptography, artificial intelligence, robotics, and networking. There is a lot of talk about what the technology of tomorrow will look like and there are a number of companies developing it. At Lemurian, we believe tomorrow is so yesterday. We are developing the technology for the day after tomorrow. We are Lemurian Labs. Welcome to the future of artificial intelligence and computing.

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