Minimum qualifications:

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
• 3 years of experience with digital logic design principles, RTL design concepts, and languages such as Verilog or SystemVerilog.
• Experience with logic synthesis techniques to optimize RTL code, performance, and power, as well as low-power design techniques.

Preferred qualifications:

• Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
• Knowledge of high performance and low-power design techniques.
• Knowledge of ASIC verification, design for testing (DFT), or physical design.
• Knowledge of hardware security.

About the job

Our computational challenges are so big, complex and unique we can't just purchase off-the-shelf hardware, we've got to make it ourselves. Your team designs and builds the hardware, software and networking technologies that power all of Google's services. As a Hardware Engineer, you design and build the systems that are the heart of the world's largest and most powerful computing infrastructure. You develop from the lowest levels of circuit design to large system design and see those systems all the way through to high volume manufacturing. Your work has the potential to shape the machinery that goes into our cutting-edge data centers affecting millions of Google users.

In this role, you will work on design and RTL development of security features and sub-systems and their integration into SOC/chassis. This includes the design, development, quality checks, tools, and flows for successful integration into SOC.

Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.

The US base salary range for this full-time position is $127,000-$187,000 bonus equity benefits. Our salary ranges are determined by role, level, and location. The range displayed on each job posting reflects the minimum and maximum target salaries for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific salary range for your preferred location during the hiring process.

Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits. Learn more about benefits at Google .

Responsibilities

• Use simulation, emulation, and power analysis tools and techniques to ensure power and performance meet defined specifications.
• Develop, implement, and maintain design blocks or components/parts of a hardware product, and integrate design blocks or components/parts to create product subsystems.
• Collaborate with cross-functional teams to debug failures (e.g., boards, software, manufacturing, design, thermal issues).
• Develop hardware security features for SOC and security sub-systems/IPs and deploy integration tools, flows, and quality checks.
• Work with cross-functional teams such as SOC integration, DFT and Physical design to ensure the successful integration of the security Sub-Systems and IPs in a complex SOC.