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Leads end-to-end system architecture spanning ASICs, SoCs, board-level hardware, firmware, and software for secure server and data-center platforms. Owns architecture and microarchitecture specifications, hardware/software partitioning, interfaces, secure boot, Root of Trust, and firmware resiliency. Engages enterprise and hyperscaler customers, standards organizations, and ecosystem partners while guiding platform integration, signal and power integrity, thermal constraints, and production hardware development.

Drive embedded computing hardware products from concept through production. Responsibilities include system design, hardware specifications, schematic capture in OrCAD, collaboration with layout, mechanical, and signal integrity engineers, lab bring-up, engineering validation, debugging, procurement, and coordinating hardware builds. The role requires board design expertise, knowledge of standard and high-speed interfaces, power converter design, server subsystems, laboratory equipment, and cross-functional communication.

Lead the hardware organization and own TCU embedded-system products from concept through high-volume production. Drive schematic design, lab bring-up, validation, mass-production yields, failure analysis, RMA resolution, supply-chain redesigns, and cross-functional system debugging. Manage senior engineers and contractors, support secure server infrastructure customers, maintain tier-one supplier relationships, and represent the company in OCP and other hardware forums. The role requires deep hands-on circuit design, server-interface, production, and hardware troubleshooting expertise.

Design architecture for System-on-Chips to enhance next-generation infrastructure, collaborating across hardware, software, and system disciplines.

Lead power-aware RTL/SoC verification: execute UPF-based simulations, integrate UPF with UVM testbenches and VIPs, create directed and constrained-random low-power tests, verify power gating/isolation/retention/reset across domains, develop assertions and coverage, support power-aware regression and sign-off, and collaborate with RTL and power architects.

The System Architect will design SoCs for transformative infrastructure products, develop specifications, and collaborate with various tech teams to establish standards.

Architect System-on-chips to transform next generation infrastructure products. Develop innovative specifications and collaborate with industry technologists on standards.

The System Architect will design System-on-Chips for next-generation infrastructure products, define hardware and software specifications, and collaborate with technologists to drive industry standards.

Lead the Quality Management System throughout the product life cycle to ensure high-quality semiconductor products. Responsibilities include designing and maintaining QMS, enforcing PLC processes, and managing product quality metrics while collaborating with functional teams and customers.

The Senior Emulation Design Engineer will convert complex SOC designs into emulation environments, validate interoperability with AI servers, and optimize performance. Responsibilities include debugging, integrating IPs, and collaborating with multiple teams.