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As a Digital Design Engineer, you will design, implement, and optimize DSP algorithms for high-speed communication systems, collaborating with cross-functional teams. The role involves algorithm optimization, simulation using MATLAB/Simulink, and integrating DSP algorithms into larger systems.

The Senior SoC Design and Integration Engineer will drive SoC design, integration, and implementation, focusing on high-speed interfaces and ASIC execution. Responsibilities include RTL design, IP verification, and working closely with teams for seamless SoC bring-up and debugging. Candidates should have strong problem-solving skills and collaborate across multiple teams to validate and integrate SoCs effectively.

The Mixed-Signal Verification Engineer will develop and maintain mixed-signal ASIC simulation environments, collaborate with design teams, analyze system-level performance, create simulation test plans, and support silicon validation efforts by correlating simulation results with lab measurements.

As a Senior Firmware Architect, you will lead the architecture and development lifecycle of an AI platform using Celestial AI's Photonic Fabric. Responsibilities include defining firmware architecture and APIs, collaborating with hardware and software teams, participating in requirements gathering, and ensuring code quality through reviews and documentation.

The Senior ASIC/VLSI Synthesis and Design Engineer will develop high-performance, low-power digital designs for ASICs and SoCs, focusing on optimizing power, performance, and area, ensuring timing closure, and conducting post-silicon validation. This role includes collaboration with cross-functional teams, implementing synthesis methodologies, and performing power analysis.

As a Chiplet Design Verification Lead, you'll oversee verification strategy and execution for complex IP, manage a team of verification engineers, and collaborate with architects and design teams to ensure successful product releases. Your responsibilities include defining verification plans and leading the verification of a complex 5nm SoC with high-speed interfaces.

The SoC Design Verification Lead will lead the verification strategy and execution for complex 5nm SoCs, collaborating with architects and design engineers, reviewing verification test plans, and mentoring a team of engineers. This role is crucial for ensuring successful product releases and first-pass tapeout success.