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The Staff Embedded SW/FW Engineer will develop and debug silicon bringup sequences, work on post-silicon validation, and lead engineering efforts on AI chip functionalities.

Design, develop, and debug silicon validation tests for AI chips, collaborating with cross-functional teams to ensure the functionality and performance of new products.

The Principal Silicon Verification Engineer is responsible for verification activities, communication across teams, verification planning, test generation, and contributing to shared verification infrastructure.

Seeking skilled silicon physical design engineers to develop AI superchips, utilizing advanced technologies, enhancing design flows, and problem-solving collaboratively.

The role involves the bring-up and characterisation of silicon devices, including creating and executing plans, testing, documenting results, and collaborating with engineering teams.

The Silicon Verification Engineer will oversee verification planning, support architects, generate tests, and enhance verification infrastructure in CPU/ASIC environments.

Lead post-silicon validation for AI SoCs, develop strategies for reliability, debug complex issues, and foster team collaboration and automation.

The Lab Manager oversees laboratory operations, ensuring equipment maintenance, compliance with safety standards, and collaboration with engineering teams while managing a team of technicians.

The Silicon Verification Engineer is responsible for planning and executing verification processes, providing feedback, generating tests, and ensuring communication among teams, with a focus on quality silicon delivery.

As a Silicon Logical Design Engineer, you will produce high-quality microarchitecture and RTL, collaborate across teams, and help ensure successful chip delivery.