New College Grad, VLSI Design Engineer (MS only, Summer 2025 start)

Posted 2 Days Ago
Be an Early Applicant
Milpitas, CA
Entry level
Big Data • Cloud • Hardware • Software
The Role
The New College Grad, VLSI Design Engineer will focus on digital design in advanced 3D NAND Flash memory, responsible for RTL design, verification, synthesis, timing analysis, and interface with teams to meet technical specifications. The role involves silicon debugging and supporting post-silicon validation.
Summary Generated by Built In

Company Description

At Western Digital, we are on a mission to unlock the potential of data so people, companies and organizations everywhere can create what’s next. To fulfill our vision, we are always on the lookout for potential team members who share our passion for solving problems to empower others.


When you join Western Digital, you join a legacy more than 50 years in the making. Across our Western Digital®, SanDisk®, SanDisk® Professional, WD® and WD_BLACK™ brands, we have brought some of the most storied advancements in memory and data storage technology to market—and our best, most innovative work is yet to come.


From energizing gaming platforms, to enabling systems to make cities safer and cars smarter and more connected, to powering the data centers behind many of the world’s biggest companies and public cloud, Western Digital is fueling a brighter, smarter future.


Here’s how you can help.

Job Description

The Memory Technology Group is at the core of the Legacy SanDisk Engineering Organization which Western Digital owns. We are building a cutting-edge 3D NAND Flash memory in our multi-billion dollars Fab. Our memory provides performance, power, and endurance at a lower cost without forgoing quality. 

We are looking for a highly motivated New College Graduate to join the Memory Technology Design team in Milpitas, CA. The candidate will be responsible for all aspects of digital design in advanced 3D NAND Flash memory, focusing on micro architecture, RTL design, verification, logic synthesis, and static timing analysis to deliver a design meeting target power, performance and area goals.

ESSENTIAL DUTIES AND RESPONSIBILITIES:

  • RTL design and verification in Verilog, RTL linting, clock domain crossing (CDC) analysis, design for testing (DFT), synthesis, timing analysis and closure
  • Balance design trade-offs with modularity, scalability, power, area, and performance.
  • Interface with internal and external teams/customers to drive necessary technical specifications and features based on individual requirements
  • Participate in silicon debugging and support post-silicon validation

This is a great opportunity for a results-oriented, entrepreneurial individual who knows how to work with non-volatile memory world-class engineers and has a great track record for delivering innovative results. You will need to think creatively about the memory as we do take pride in our craftsmanship. We do work together with all engineering teams to identify and execute on the most disciplined way. Your success will be measured by your ability to build great designs that deliver innovation that unlock revenue opportunities for the company.

Qualifications

REQUIRED:

  • Master’s degree in electrical engineering, computer engineering, or related engineering field with a graduation date before July 2025.
    The expected start date for this position is in July or August 2025.
  • Knowledge of the entire Logic Design Flow (from RTL to GDSII) is required, (including Micro architecture, Verilog RTL coding, simulation, synthesis, static timing analysis, logic equivalence, DFT insertion, place-and-route, clock tree synthesis, extraction, timing closure and signoff, physical verification)
  • Knowledge of logic design principles along with timing and power implications
  • Good critical thinking, problem-solving, and presentation skills are required
  • Excellent communication (written and verbal) and interpersonal skills with the ability to work in a cross-functional team setting

PREFERRED:

  • Industry or academic experience in digital circuit design or RTL design is preferred, especially from full-time or internship experience
  • Working knowledge on C, C++, Python is preferred
  • Decent knowledge in Memory Design concept is preferred

Additional Information

Western Digital is committed to providing equal opportunities to all applicants and employees and will not discriminate against any applicant or employee based on their race, color, ancestry, religion (including religious dress and grooming standards), sex (including pregnancy, childbirth or related medical conditions, breastfeeding or related medical conditions), gender (including a person’s gender identity, gender expression, and gender-related appearance and behavior, whether or not stereotypically associated with the person’s assigned sex at birth), age, national origin, sexual orientation, medical condition, marital status (including domestic partnership status), physical disability, mental disability, medical condition, genetic information, protected medical and family care leave, Civil Air Patrol status, military and veteran status, or other legally protected characteristics. We also prohibit harassment of any individual on any of the characteristics listed above. Our non-discrimination policy applies to all aspects of employment. We comply with the laws and regulations set forth in the "Know Your Rights: Workplace Discrimination is Illegal” poster. Our pay transparency policy is available here.


Western Digital thrives on the power and potential of diversity. As a global company, we believe the most effective way to embrace the diversity of our customers and communities is to mirror it from within. We believe the fusion of various perspectives results in the best outcomes for our employees, our company, our customers, and the world around us. We are committed to an inclusive environment where every individual can thrive through a sense of belonging, respect and contribution.


Western Digital is committed to offering opportunities to applicants with disabilities and ensuring all candidates can successfully navigate our careers website and our hiring process. Please contact us at [email protected] to advise us of your accommodation request. In your email, please include a description of the specific accommodation you are requesting as well as the job title and requisition number of the position for which you are applying.



Based on our experience, we anticipate that the application deadline will be 2/20/25, although we reserve the right to close the application process sooner if we hire an applicant for this position before the application deadline. If we are not able to hire someone from this role before the application deadline, we will update this posting with a new anticipated application deadline.

#LI-AP1

Compensation & Benefits Details

  • An employee’s pay position within the salary range may be based on several factors including but not limited to (1) relevant education; qualifications; certifications; and experience; (2) skills, ability, knowledge of the job; (3) performance, contribution and results; (4) geographic location; (5) shift; (6) internal and external equity; and (7) business and organizational needs.
  • The salary range is what we believe to be the range of possible compensation for this role at the time of this posting. We may ultimately pay more or less than the posted range and this range is only applicable for jobs to be performed in California, Colorado, New York or remote jobs that can be performed in California, Colorado and New York. This range may be modified in the future.
  • You will be eligible to participate in Western Digital’s Short-Term Incentive (STI) Plan, which provides incentive awards based on Company and individual performance. Depending on your role and your performance, you may be eligible to participate in our annual Long-Term Incentive (LTI) program, which consists of restricted stock units (RSUs) or cash equivalents, pursuant to the terms of the LTI plan. Please note that not all roles are eligible to participate in the LTI program, and not all roles are eligible for equity under the LTI plan. RSU awards are also available to eligible new hires, subject to Western Digital’s Standard Terms and Conditions for Restricted Stock Unit Awards.
  • We offer a comprehensive package of benefits including paid vacation time; paid sick leave; medical/dental/vision insurance; life, accident and disability insurance; tax-advantaged flexible spending and health savings accounts; employee assistance program; other voluntary benefit programs such as supplemental life and AD&D, legal plan, pet insurance, critical illness, accident and hospital indemnity; tuition reimbursement; transit; the Applause Program, employee stock purchase plan, and the Western Digital Savings 401(k) Plan.
  • Note: No amount of pay is considered to be wages or compensation until such amount is earned, vested, and determinable. The amount and availability of any bonus, commission, benefits, or any other form of compensation and benefits that are allocable to a particular employee remains in the Company's sole discretion unless and until paid and may be modified at the Company’s sole discretion, consistent with the law.

Top Skills

Verilog
The Company
HQ: Bengaluru, Karnataka
25,132 Employees
On-site Workplace

What We Do

At Western Digital we create data storage solutions that power the technology of today and inspire the innovations of tomorrow.

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