Lead Emulation Engineer

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What you do at AMD changes everything

We care deeply about transforming lives with AMD technology to enrich our industry, our communities and the world. Our mission is to build great products that accelerate next-generation computing experiences - the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world's most important challenges. We strive for execution excellence, while being direct, humble, collaborative and inclusive of diverse perspectives. This is who we are at our best. One Company. One Team.

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LEAD EMULATION ENGINEER

THE PERSON:

Emulation Engineers are active technical leaders inside and outside the company in the field of pre-silicon validation. In an ideal engineer, we are looking for talented and passionate Emulation engineer to develop Emulation environment for the next generation Server CPUs. Pre-SI System Level Verification is a huge challenge in complex CPU projects. This position enables to gain deep understanding of complex CPU Architecture/u-Architectures, protocols and HW-SW interactions to hunt system level corner case bugs. Work includes implementation of real life tests, SW workloads, drivers and end-to-end flow checkers on high-end fast emulation platforms simulating hundreds of millions of cycles to find the most complex CPU bugs.

THE ROLE:

In this capacity, you will work with cross functional team - RTL, Val / Verification, Emulation Transactor, BIOS, microcode, emulation test teams and emulation tools vendors - to define and execute emulation model build and bring-up. You will work the multiple stakeholders to define emulation platform requirements, understand micro-architecture and architecture of SOC including processors, NOC, high speed memories, security, etc and also the emulation transactors. Analyze the scope, define, build and bring-up emulation models, adapt and enhance the debug infrastructure, which includes debug infrastructure development, debug failures and ensure functionality as per specifications.

PREFERRED EXPERIENCE:

  • Knowledge with FPGA.
  • SW Knowledge in: C++, Python and Perl - advantage.
  • Knowledge with RTL design, Verilog and simulation, debug tools such as Verdi, System Verilog based verification techniques.
  • Team player, passionate, energetic, motivated, and self-driven


ACADEMIC CREDENTIALS:

  • Bachelors or Masters degree in Electrical, Electronics or Computer Engineering.


LOCATION:

Roseville, CA

Folsom, CA

#LI-LM1

Requisition Numbe r: 164924
Country: United States State: California City: Roseville
Job Function: Design

Benefits offered are described here .

AMD does not accept unsolicited resumes from headhunters, recruitment agencies or fee based recruitment services. AMD and its subsidiaries are equal opportunity employers. We consider candidates regardless of age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status. Please click here for more information.

More Information on AMD
AMD operates in the Semiconductor industry. The company is located in Santa Clara, CA, Bellevue, WA, Fort Collins, CO, Austin, TX, Houston, TX, Orlando, FL and Boxborough, MA. AMD was founded in 1969. It has 18649 total employees. It offers perks and benefits such as Flexible Spending Account (FSA), Disability insurance, Dental insurance, Vision insurance, Health insurance and Life insurance. To see all jobs at AMD, click here.
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