FPGA Verification Engineer

| Dallas-Fort Worth, TX
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Mavenir is building the future of networks and pioneering advanced technology, focusing on the vision of a single, software-based automated network that runs on any cloud. As the industry's only end-to-end, cloud-native network software provider, Mavenir is transforming the way the world connects, accelerating software network transformation for 250+ Communications Service Providers in over 120 countries, which serve more than 50% of the world's subscribers.

Role Summary

Today we use 3rd party products for RRUs to go with our 4G and 5G OpenRAN solutions. To expand our product portfolio, we will develop own high-end Massive MIMO radios. Focus will be on advanced technology and product development together with customers. We will progress this as a start-up company in Mavenir and leverage the whole organization. If you would like to work for a startup with resources, a large existing customer base and worldwide reach, this is it.

As Senior FPGA Design and Verification Engineer for Board Management and Low PHY functional blocks you will join the Radio Development team for developing high end OpenRAN 5G and 4G mMIMO RRUs. This position will be based in Richardson, Texas.

Key Responsibilities

  • Ownership from concept to customer product in terms of verification and quality for the FPGA implementing the board management and Low PHY functional blocks
  • RTL development and Verification of board management functions in FPGA within the massive MIMO RRU
  • Design and development of the RTL verification environment
  • Deploying UVM methodology & developing Testbenches and Verification Components such as UVCs/VIPs, models, BFMs, scalable and Re-usable Verification Environment
  • Develop automated flows using scripting such as TCL, Perl, shell, Python
  • Create RTL verification test plans with test cases that can be traced to system requirements
  • Responsible for writing VHDL/Verilog/SV/C and using tools to emulate system test conditions derived from system requirements and interface specifications
  • Exercise constrained test vectors, standard test vectors, performance, benchmark, coverage and latency analysis
  • Development of unit-test framework to validate the Low PHY and Beamforming IP Blocks, that can be reused in top level RTL verification
  • HW bring up in terms of configuration, sequence, and initialization, including replicating HW scenarios in verification environment
  • Work within the FPGA design team for validation and integration of the Low PHY and BF within overall system
  • Manual and automated test execution within the RTL verification environment developed including regression
  • Test coverage analysis and continuous improvement to RTL verification environment
  • Identify opportunities for innovation within design, and RTL verification of FPGA systems used in RRU



Job Requirements

  • At least 7 years of experience in FPGA design/development and in IP level and system level verification development
  • Experience in complete verification cycle in UVM or similar methodology (i.e. test bench development, test case writing and debugging, test plan development, functional, code coverage closure and regression suite).
  • In depth knowledge with Verification methodologies including UVM, UVM with MATLAB/C and co-simulation
  • Expertise in one or more of VHDL, Verilog, System Verilog and SystemC
  • Expertise in bit and cycle accurate modelling in MATLAB/C/C++ and HDL
  • Experience with FPGA design and implementation of board management of a large system
  • Experience with model-based signal processing flows such as MATLAB, Simulink, HDL Coder and integration with FPGAs devices such as from Xilinx and Intel
  • Experience in creating a structured test plan and test cases derived from system requirements
  • Experience with scripting and programming languages such as Python, C, TCL
  • Experience with simulation tool, preferably Questasim and UVM framework
  • Experience with debugging HW/SW issues and the use of equipment/tools such as oscilloscope, logic analyzer, chipscope, spectrum analyzer
  • Knowledge of digital signal processing techniques such as filter designs, time-frequency transforms, and data converters as applied to, and applicable to, 4G and 5G wireless systems will be a plus
  • Knowledge of ORAN will be a plus
  • Excellent inter-personal and leadership skills
  • Curious minded person striving for continuous learning and innovation
  • Outstanding verbal and written communication skills
  • Ability to quickly grasp and adapt to new technologies and concepts
  • MS Degree in EE



#LI-MAGS

Accessibility

Mavenir is committed to working with and providing reasonable accommodation to individuals with physical and mental disabilities. If you are a US applicant in need of special assistance or an accommodation while seeking employment, please e-mail [email protected] or call: +1-469-916-4393. We will make a determination on your request for reasonable accommodation on a case-by-case basis.

Mavenir is an Equal Employment Opportunity (EEO) employer and welcomes qualified applicants from around the world, regardless of their ethnicity, gender, religion, nationality, age, disability, or other legally protected status.

More Information on Mavenir
Mavenir operates in the Cloud industry. The company is located in Richardson, TX. Mavenir was founded in 2005. It has 5370 total employees. It offers perks and benefits such as Health insurance, 401(K). To see all jobs at Mavenir, click here.
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