ASIC Emulation Architect
Waymo is an autonomous driving technology company with a mission to make it safe and easy for people and things to get where they’re going. Since our start as the Google Self-Driving Car Project in 2009, Waymo has been focused on building the World’s Most Experienced Driver in hopes of improving the world's access to mobility while saving thousands of lives now lost to traffic crashes. Our Waymo Driver powers Waymo One, our fully autonomous ride-hailing service, as well as Waymo Via, our trucking and local delivery service. To date, Waymo has driven over 20 million miles autonomously on public roads across 25 U.S. cities and conducted over 20 billion miles of simulation testing.
Waymo's Compute Team is tasked with a critical and exciting mission: We deliver the compute platform responsible for running the fully autonomous vehicle’s software stack. To achieve our mission, we architect and create high-performance custom silicon; we develop system-level compute architectures that push the boundaries of performance, power, and latency; and we collaborate closely with many other teammates to ensure we design and optimize hardware and software for maximum performance. We are a multidisciplinary team seeking curious and talented teammates to work on one of the world’s highest performance automotive compute platforms.
In this role, you'll:
- Execute on the emulation test plan to assist pre-silicon verification efforts
- Build and maintain healthy model build and runtime infrastructure
- Collaborate with architects, verification, and software developers to ensure current and future emulation needs are met
- Develop tools and flows to maximize productivity during debug, runtime, and data analysis of results from emulation runs
- Drive emulation strategy across all verification projects
At a minimum we’d like you to have:
- Knowledge of current emulation technologies and methods, including testbench acceleration, in-circuit emulation, virtual prototyping, hybrid methods
- Experience with verification of large, complex SoCs or similar designs
- Architect verification systems for various design scales (block, system, multi-chip) with a full understanding of tradeoffs between performance and ease of debug
- Experience with EDA tools and scripting languages (Python, Tcl is a plus) used to build tools and flows for complex emulation environments
- Experience using SystemVerilog and C++ to model RTL components and transactors
- Able to interface with the RTL design, design verification, and software development teams and discover their needs from an emulation perspective
It’s preferred if you have:
- Use emulation results to feed back performance and power attributes to the design team
- Use emulation for pre-silicon DFT and power simulations
- Assist post-silicon bring-up activities by developing and running tests in emulation
- Understanding of continuous integration principles and ability to design complex build flows for emulation
- Familiarity with FPGA prototyping platforms