Lattice Semiconductor
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The Engineering Tech 2 at Lattice is responsible for wafer probe setup, visual inspection and testing of semiconductor ICs, bench testing, ATE hardware bring-up and debug, soldering, and lab organization. The role requires an Associate's degree in Electrical or Electronic Engineering, 2+ years of experience, MS Office familiarity, and strong organizational and communication skills.
This intern position at Lattice offers an opportunity to learn and participate in cutting-edge projects in Silicon Design Validation, focusing on FPGA building blocks validation. Responsibilities include validation and characterization of integrated circuit products, development of validation plans and test cases, product performance determination, and collaboration with cross-functional teams. The role requires an Electrical Engineering degree and strong communication skills.
Lattice Semiconductor is seeking a Senior Product Marketing Manager to drive the promotional plan, define messaging, provide status updates, and contribute to the new product roadmap. Required skills include system design using FPGAs, product marketing experience, and strong communication skills.
Plan, develop, and execute validation and characterization of Lattice Integrated Circuit (IC) products. Drive new silicon product bring-up, debug, and characterization. Develop innovative test methodologies and define robust validation plans.
Develop FPGA software implementation tools and optimize design flows for mid-range FPGA market. Utilize C++ and data structures to enhance efficiency and performance. Debug customer design issues and contribute to FPGA design flow development. Bachelor's degree in Electrical Engineering required. Located in San Jose, California.
Design new digital hardware products, develop micro-architecture spec, integrate internal and 3rd party IP, collaborate with cross-functional teams, participate in silicon bring-up